B–65160E/02
3. EXPLANATION OF
PARAMETERS
FANUC AC SPINDLE MOTOR a series
175
BLTRGD:
Setting for rigid tapping using the arbitrary gear ratio (command) in
the built–in MZ sensor built–in sensor
0: In cases other than below
1: When rigid tapping is performed using the MZ sensor in the
motor
16i/16 #7 #6 #5 #4 #3 #2 #1 #015 15i0
PHAICL PCALCH PCLS
Conventional
PCALCH PCLS
HRV
6507 3007 3007 4007
6647 3147
Standard setting: 0 0 0 0 0000
PCLS : Determines high-resolution magnetic pulse coder and position coder
signal disconnection detection.
0: Performs disconnection detection. (Normally set to ”0”)
1: Does not perform disconnection detection.
Set it to 0:
AL-26 (High-resolution magnetic pulse coder speed detecting signal
disconnection),
AL-27 (Position coder signal disconnection) and
AL-28 (High-resolution magnetic pulse coder speed detecting signal
disconnection) are checked.
Set it to ”1” temporarily when adjustment is difficult when adjusting
location and speed feedback signal waves and the disconnection alarm
occurs. After adjustment reset it to ”0”.
PCALCH:
Enables or disables detection of the alarms (AL-41, 42, 47) related to
the position coder signal
0: Detects the alarms related to the position coder signal.
1: Does not detect the alarms related to the position coder signal.
When this bit is set to 0, AL–41 (position coder one–rotation signal
detection error), AL–42 (position coder one–rotation signal not
detected), and AL–47 (position coder signal error) are checked.
When the spindle is not connected to a position coder on a one–to–one
basis, set this bit to 1 to prevent detection errors.
PHAICL:
Setting of a motor voltage pattern when no loads are imposed
Usually, set this parameter to 1.
16i/16 #7 #6 #5 #4 #3 #2 #1 #015 15i0
OVRTVP TRSPCM LDTOUT PCGEAR ALSP RVSVCM VLPGAN
Conventional
OVRTVP LDTOUT PCGEAR ALSP RVSVCM VLPGAN
HRV
6509 3009 3009 4009
6649 3149
Standard setting: 0 0 0 0 0000
VLPGAN:
Setting unit of speed control loop gain
0: To be set usually (Normally set to ”0”)
1: Multiplies the normal setting by 1/16.