FANUC PMC-MODEL SD7
EDIT DATE DESIG.
When the Shift Register function (SHFR_BIT, SHFR_BYTE,
SHFR_WORD or SHFR_DWORD) receives power and R does not, the
function shifts one or more data bits or data words from a reference
location into a specified area of memory. A contiguous section of
memory serves as a shift register. For example, one word might be
shifted into an area of memory with a specified length of five words. As
a result of this shift, another word of data would be shifted out of the
end of the memory area.
The reset input (R) takes precedence over the function enable input.
When the reset is active, all references beginning at the shift register
(ST) up to the length specified for the LEN operand, are filled with
If the function receives power flow and R is not active, each bit or word
of the shift register is moved to the next highest reference. The last
element in the shift register is shifted into Q. The highest reference of
the shift register element of IN is shifted into the vacated element
starting at ST.
The function passes power to the right whenever the function receives
power flow and the R operand does not. ON.
Parameter Data type Meaning
EN BOOL Execution of operation
Length; the number of data in
the shift register. 1<=LEN<=256
R BOOL Reset
IN ANY The value to be shifted into the