
2. SEQUENCE PROGRAM
B–61863E/15
PMC SEQUENCE PROGRAM
54
The status of the same input signal may be different in the 1st level and
2nd level sequences. That is, at 1st level, processing is performed using
input signal memory and at 2nd level, processing is performed using the
2nd level synchronous input signal memory. Therefore, it is possible for
a 2nd level input signal to delay by a cycle of 2nd level sequence execution
at the worst, compared with a 1st level input signal.
This must be kept in mind when writing the sequence program.
Signal statesO
A.M ON (short time width pulse signal)
B OFF
COF
Differences drawn in Fig. 2.5.4 (a) and Fig. 2.5.4 (b) when the 1st level
sequence has been executed are as follows:
(a) Fig. 2.5.4 (a)
W2 may not be 1 even when W1=1. (Because the A.M signal may
be different at the 1st and 2nd levels.)
(b) Fig. 2.5.4 (b)
If W1=1, W2=1.
When performing the sequence shown in Fig. 2.5.4 (a), proceed
as follows:
At 1st level, perform a high–speed sequence when the A.M signal
changes (operating).
At 2nd level, perform sequence processing when the A.M signal
does not change (stopped).
A.M B
W1
END 1
A.M C
W2
A.M B
W1
END 1
W1 C
W2
1st Level
2nd Level
Fig. 2.5.4 (a) Fig. 2.5.4 (b)
2.5.4
Difference of Status of
Signals between 1st
Level and 2nd Level